In a double diffusion break (DDB) structure, a lateral width (in the current transport direction or gate length direction of the FinFET devices) of the isolation material between two active regions approximately corresponds to the lateral width of two of the gate structures. On the other hand, in a single diffusion break (SDB), the lateral width (in the current transport direction or gate length direction of the FinFET devices) of the isolation material between the two active regions is less than the lateral width of a single gate structure.
In general, it is easier to form a DDB isolation structure than it is to form a SDB due to the relatively larger size of the DDB isolation structure. However, the use of such DDB isolation structures consumes more of the available space on a substrate than does the use of SDB isolation structures, thereby leading to reduced packing densities. Some integrated circuit products use both DDB and SDB isolation structures in different regions of a product. For example, logic regions of an integrated circuit product may employ SDB isolation structures, whereas SRAM regions may employ DDB isolation structures.
Moreover, SDB device performance is weaker compared to DDB devices. This is due to a weaker source and drain. The weaker device performance of SDB devices restricts its usage in the chip even though it has higher packaging density than DDB devices. Moreover, faceted source/drain poses another problem while trying to boost SDB device performance, particularly using junction elements. For example, faceted source/drain in SDB devices can lead to approximately an 8-10% performance gap compared to DDB devices because the source/drain is not fully grown in the facet.